📈 ADC Sampling Time Calculator

Conversion time and max sample rate from ADC clock, resolution, and sampling cycles.

ADCCLK after its own prescaler (e.g. APB2/2).
Successive-approximation adds 0.5 cycle.
STM32F4-style selectable sampling times.
Total conversions per scan (regular sequence length).

How it works

A successive-approximation ADC conversion takes a fixed number of sampling cycles (to charge the sample-and-hold capacitor) plus a resolution-dependent number of bit-trial cycles:

tconv = (sampling cycles + resolution cycles) ÷ fADC

Resolution cycles are resolution/2 + 0.5 (e.g. 12.5 cycles for 12-bit). Longer sampling times improve accuracy on high-impedance sources at the cost of throughput; scanning multiple channels multiplies the per-channel conversion time.