STM32 Timer Calculator
Find PSC / ARR (and CCR) register values to hit a target timer frequency or period.
Best match
PSC
–
ARR
–
CCR (duty)
–
Actual freq
–
Period
–
Error
–
All solutions
| # | PSC | ARR | CCR | Actual freq (Hz) | Period | Error (%) |
|---|
How it works
An STM32 hardware timer counts pulses from its input clock through a prescaler. The update (overflow) event frequency is:
fupdate = ftimer ÷ ((PSC + 1) × (ARR + 1))
The tool sweeps every valid PSC value, solves for the matching
ARR, and keeps combinations whose resulting frequency is within your
accepted error. For PWM, the compare value is
CCR = round((ARR + 1) × duty / 100).
Both PSC and ARR are stored as value − 1
in the STM32 registers, which is why the formula adds 1 to each.